Shrink cycle times for new chip development

EDA workflow requirements vary widely. On the frontend are massively parallel RTL simulations with up to a million metadata-heavy small files. On the backend are the processing demands of large physical and manufacturing files. EDA infrastructures need the flexibility to support the necessary performance requirements (latency, IOPs, and throughput) of highly parallel and often bursty EDA workflows.

The cloud is clearly the next phase of development for modern EDA workflow design. Traditional EDA workflows are being strained to support the levels of compute and storage leading edge process technologies like 10nm, 7nm and 5nm require. This is placing a heavier burden on IT infrastructures than traditional on premises solutions can bear. When organizations take advantage of cloud elasticity they can operate EDA workflows at lower costs when not busy and rapidly scale when more resources are needed. This is why, as EDA vendors, designers, and semiconductor manufacturers develop more integrated workflows, the cloud will be the next logical phase of integration.